Added adder handout

This commit is contained in:
Mark 2024-01-27 13:02:53 -08:00
parent 372c52376d
commit c2672e135b
Signed by: Mark
GPG Key ID: C6D63995FE72FD80

92
Misc/Warm-Ups/adders.tex Executable file
View File

@ -0,0 +1,92 @@
\documentclass[
solutions,
singlenumbering,
nopagenumber
]{../../resources/ormc_handout}
\usepackage{../../resources/macros}
\title{Warm-Up: Adders}
\subtitle{Prepared by \githref{Mark} on \today}
\begin{document}
\maketitle
\problem{}
Fill the following binary addition table. \par
\hint{s is \say{sum,} c is \say{carry}}
\begin{center}
\begin{tabular}{ c c || c c }
$a$ & $b$ & s & c \\
\hline
0 & 0 & ? & ? \\
0 & 1 & ? & ? \\
1 & 0 & ? & ? \\
1 & 1 & ? & ?
\end{tabular}
\end{center}
\vfill
\problem{}
Draw a logic circuit that atisfies the above table. \par
This is called a \textit{half adder}. \par
\hint{You should need exactly two gates.}
\begin{solution}
$s = a \texttt{ xor } b$ \par
$c = a \texttt{ and } b$
\end{solution}
\vfill
\definition{}
A \textit{full adder} is similar to a half adder, but it has an extra input: \par
a full adder takes $a$, $b$, and $c_\text{in}$, and produces $s$ and $c_\text{out}$. \par
\hint{$c_\text{in}$ is \say{carry in}}
\problem{}
Use two half adders to construct a full adder.
\begin{solution}
$s_1, c_1 = \texttt{HA}(a, b)$ \par
$s_2, c_2 = \texttt{HA}(s_1, c_\text{in})$ \par
$s_\text{out} = s_2$ \par
$c_\text{out} = \texttt{OR}(c_1, c_2)$
\vspace{2mm}
Of course, the class should just draw the circuit.
\end{solution}
\vfill
\pagebreak
\problem{}<rippleadder>
How can we add two four-bit binary numbers using the full adder? \par
We want a four-bit output sum and one-bit $c_\text{out}$.
\vfill
\problem{}
Say that all basic logic gates need $1u$ of time to fully switch states. \par
\note[Note]{This is called \textit{gate delay}}
\vspace{2mm}
How much time does a full adder need to fully switch states? \par
How about your circuit from \ref{rippleadder}?
\vfill
\problem{Bonus}
Design a faster solution to \ref{rippleadder}.
\vfill
\pagebreak
\end{document}