Added IDT

tetros/src/idt/stackframe.rs

@@ -0,0 +1,142 @@
+use core::{fmt, ops::Deref};
+
+use super::VirtAddr;
+
+use bitflags::bitflags;
+
+bitflags! {
+	/// The EFLAGS register. All bit patterns are valid representations for this type.
+	///
+	/// See https://wiki.osdev.org/CPU_Registers_x86#EFLAGS_Register
+	#[repr(transparent)]
+	#[derive(PartialEq, Eq, PartialOrd, Ord, Hash, Debug, Clone, Copy)]
+	pub struct EFlags: u32 {
+		/// Processor feature identification flag.
+		///
+		/// If this flag is modifiable, the CPU supports CPUID.
+		const ID = 1 << 21;
+
+		/// Indicates that an external, maskable interrupt is pending.
+		///
+		/// Used when virtual-8086 mode extensions (CR4.VME) or protected-mode virtual
+		/// interrupts (CR4.PVI) are activated.
+		const VIRTUAL_INTERRUPT_PENDING = 1 << 20;
+
+		/// Virtual image of the INTERRUPT_FLAG bit.
+		///
+		/// Used when virtual-8086 mode extensions (CR4.VME) or protected-mode virtual
+		/// interrupts (CR4.PVI) are activated.
+		const VIRTUAL_INTERRUPT = 1 << 19;
+
+		/// Enable automatic alignment checking if CR0.AM is set. Only works if CPL is 3.
+		const ALIGNMENT_CHECK = 1 << 18;
+
+		/// Enable the virtual-8086 mode.
+		const VIRTUAL_8086_MODE = 1 << 17;
+
+		/// Allows to restart an instruction following an instruction breakpoint.
+		const RESUME_FLAG = 1 << 16;
+
+		/// Used by `iret` in hardware task switch mode to determine if current task is nested.
+		const NESTED_TASK = 1 << 14;
+
+		/// The high bit of the I/O Privilege Level field.
+		///
+		/// Specifies the privilege level required for executing I/O address-space instructions.
+		const IOPL_HIGH = 1 << 13;
+
+		/// The low bit of the I/O Privilege Level field.
+		///
+		/// Specifies the privilege level required for executing I/O address-space instructions.
+		const IOPL_LOW = 1 << 12;
+
+		/// Set by hardware to indicate that the sign bit of the result of the last signed integer
+		/// operation differs from the source operands.
+		const OVERFLOW_FLAG = 1 << 11;
+
+		/// Determines the order in which strings are processed.
+		const DIRECTION_FLAG = 1 << 10;
+
+		/// Enable interrupts.
+		const INTERRUPT_FLAG = 1 << 9;
+
+		/// Enable single-step mode for debugging.
+		const TRAP_FLAG = 1 << 8;
+
+		/// Set by hardware if last arithmetic operation resulted in a negative value.
+		const SIGN_FLAG = 1 << 7;
+
+		/// Set by hardware if last arithmetic operation resulted in a zero value.
+		const ZERO_FLAG = 1 << 6;
+
+		/// Set by hardware if last arithmetic operation generated a carry ouf of bit 3 of the
+		/// result.
+		const AUXILIARY_CARRY_FLAG = 1 << 4;
+
+		/// Set by hardware if last result has an even number of 1 bits (only for some operations).
+		const PARITY_FLAG = 1 << 2;
+
+		/// Set by hardware if last arithmetic operation generated a carry out of the
+		/// most-significant bit of the result.
+		const CARRY_FLAG = 1;
+	}
+}
+
+/// Wrapper type for the interrupt stack frame pushed by the CPU.
+///
+/// This type derefs to an [`InterruptStackFrameValue`], which allows reading the actual values.
+///
+/// This wrapper type ensures that no accidental modification of the interrupt stack frame
+/// occurs, which can cause undefined behavior (see the [`as_mut`](InterruptStackFrame::as_mut)
+/// method for more information).
+#[repr(transparent)]
+pub struct InterruptStackFrame(InterruptStackFrameValue);
+
+impl Deref for InterruptStackFrame {
+	type Target = InterruptStackFrameValue;
+
+	#[inline]
+	fn deref(&self) -> &Self::Target {
+		&self.0
+	}
+}
+
+impl fmt::Debug for InterruptStackFrame {
+	#[inline]
+	fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+		self.0.fmt(f)
+	}
+}
+
+/// Represents the interrupt stack frame pushed by the CPU on interrupt or exception entry.
+///
+/// See https://wiki.osdev.org/Interrupt_Service_Routines#x86
+#[derive(Clone, Copy)]
+#[repr(C)]
+pub struct InterruptStackFrameValue {
+	/// This value points to the instruction that should be executed when the interrupt
+	/// handler returns. For most interrupts, this value points to the instruction immediately
+	/// following the last executed instruction. However, for some exceptions (e.g., page faults),
+	/// this value points to the faulting instruction, so that the instruction is restarted on
+	/// return.
+	pub eip: VirtAddr,
+
+	/// The code segment selector at the time of the interrupt.
+	pub cs: u16,
+
+	/// Padding for CS
+	_reserved1: [u8; 2],
+
+	/// The EFLAGS register before the interrupt handler was invoked.
+	pub cpu_flags: EFlags,
+}
+
+impl fmt::Debug for InterruptStackFrameValue {
+	fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+		let mut s = f.debug_struct("InterruptStackFrame");
+		s.field("instruction_pointer", &self.eip);
+		s.field("code_segment", &self.cs);
+		s.field("cpu_flags", &self.cpu_flags);
+		s.finish()
+	}
+}