From 2369d866170dfb3e67fc04afd48fed63577f0d0b Mon Sep 17 00:00:00 2001
From: Mark <mark@betalupi.com>
Date: Tue, 25 Feb 2025 19:22:48 -0800
Subject: [PATCH] ci?

---
 .gitea/workflows/ci.yml | 5 ++++-
 bios/gdt.asm            | 8 ++++----
 tetros/src/idt/entry.rs | 4 ++++
 tetros/src/idt/table.rs | 2 ++
 typos.toml              | 4 ++--
 5 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/.gitea/workflows/ci.yml b/.gitea/workflows/ci.yml
index 89d9608..561b7a1 100644
--- a/.gitea/workflows/ci.yml
+++ b/.gitea/workflows/ci.yml
@@ -26,7 +26,7 @@ jobs:
     steps:
       - uses: actions/checkout@v4
 
-      - name: "Install TeXLive"
+      - name: "Install Rust"
         run: |
           sudo apt update
           DEBIAN_FRONTEND=noninteractive \
@@ -36,3 +36,6 @@ jobs:
       - name: Run clippy
         working-directory: ./tetros
         run: cargo clippy --all-targets --all-features
+
+      - name: Build
+        run: make
diff --git a/bios/gdt.asm b/bios/gdt.asm
index 0322a53..e86f696 100644
--- a/bios/gdt.asm
+++ b/bios/gdt.asm
@@ -1,6 +1,6 @@
 SECTION .text ; cannot use .data
 
-struc GDTEntry
+struc GDTEntry ; spell:disable:line
     .limitl resw 1
     .basel resw 1
     .basem resb 1
@@ -26,21 +26,21 @@ gdt_attr:
     .accessed             equ 1 << 0
 ;system
 ;   legacy
-    .tssAvailabe16        equ 0x1
+    .tssAvailabe16        equ 0x1 ; spell:disable:line
     .ldt                  equ 0x2
     .tssBusy16            equ 0x3
     .call16               equ 0x4
     .task                 equ 0x5
     .interrupt16          equ 0x6
     .trap16               equ 0x7
-    .tssAvailabe32        equ 0x9
+    .tssAvailabe32        equ 0x9 ; spell:disable:line
     .tssBusy32            equ 0xB
     .call32               equ 0xC
     .interrupt32          equ 0xE
     .trap32               equ 0xF
 ;   long mode
     .ldt32                equ 0x2
-    .tssAvailabe64        equ 0x9
+    .tssAvailabe64        equ 0x9 ; spell:disable:line
     .tssBusy64            equ 0xB
     .call64               equ 0xC
     .interrupt64          equ 0xE
diff --git a/tetros/src/idt/entry.rs b/tetros/src/idt/entry.rs
index a8056d5..9b3ff91 100644
--- a/tetros/src/idt/entry.rs
+++ b/tetros/src/idt/entry.rs
@@ -61,6 +61,7 @@ impl<T> fmt::Debug for Entry<T> {
 	}
 }
 
+// spell:off
 impl<F> Entry<F> {
 	/// Create a valid non-present IDT entry.
 	#[inline]
@@ -111,7 +112,9 @@ impl<F> Entry<F> {
 		))
 	}
 }
+// spell:on
 
+// spell:off
 impl<F: HandlerFuncType> Entry<F> {
 	/// Sets the handler address for the IDT entry and sets the following defaults:
 	///   - The code selector is the code segment currently active in the CPU
@@ -125,3 +128,4 @@ impl<F: HandlerFuncType> Entry<F> {
 		unsafe { self.set_handler_addr(handler.to_virt_addr()) }
 	}
 }
+// spell:on
diff --git a/tetros/src/idt/table.rs b/tetros/src/idt/table.rs
index 92b7478..65bce1a 100644
--- a/tetros/src/idt/table.rs
+++ b/tetros/src/idt/table.rs
@@ -16,6 +16,7 @@ struct IDTR {
 // MARK: idt
 //
 
+// spell:off
 #[derive(Clone, Debug)]
 #[repr(C)]
 #[repr(align(8))]
@@ -410,6 +411,7 @@ pub struct InterruptDescriptorTable {
 	///   instruction pointer points to the instruction after the INTn.
 	interrupts: [Entry<HandlerFunc>; 256 - 32],
 }
+// spell:on
 
 //
 // MARK: impl
diff --git a/typos.toml b/typos.toml
index 94744d8..eed47b0 100644
--- a/typos.toml
+++ b/typos.toml
@@ -1,8 +1,8 @@
 [default]
 extend-ignore-re = [
 	# spell:disable-line
-	"(?Rm)^.*(%|#|//)\\s*spell:disable-line$",
+	"(?Rm)^.*(%|#|//|;)\\s*spell:disable-line$",
 
 	# spell:<on|off>
-	"(?s)(%|#|//)\\s*spell:off.*?\\n\\s*(%|#|//)\\s*spell:on",
+	"(?s)(%|#|//|;)\\s*spell:off.*?\\n\\s*(%|#|//)\\s*spell:on",
 ]