From 497c85338ee61bf09cc7d7b09779035f532bc822 Mon Sep 17 00:00:00 2001
From: Mark <mark@betalupi.com>
Date: Fri, 24 Jan 2025 17:55:36 -0800
Subject: [PATCH] Convert "Adders" to typst

---
 src/Warm-Ups/Adders/main.tex | 93 ------------------------------------
 src/Warm-Ups/Adders/main.typ | 85 ++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+), 93 deletions(-)
 delete mode 100755 src/Warm-Ups/Adders/main.tex
 create mode 100644 src/Warm-Ups/Adders/main.typ

diff --git a/src/Warm-Ups/Adders/main.tex b/src/Warm-Ups/Adders/main.tex
deleted file mode 100755
index ab4f1cf..0000000
--- a/src/Warm-Ups/Adders/main.tex
+++ /dev/null
@@ -1,93 +0,0 @@
-\documentclass[
-	nosolutions,
-	singlenumbering,
-	nopagenumber
-]{../../../lib/tex/ormc_handout}
-\usepackage{../../../lib/tex/macros}
-
-
-\title{Warm-Up: Adders}
-\uptitler{\smallurl{}}
-\subtitle{Prepared by Mark on \today}
-
-\begin{document}
-
-	\maketitle
-
-	\problem{}
-	Fill the following binary addition table. \par
-	\hint{s is \say{sum,} c is \say{carry}}
-
-	\begin{center}
-		\begin{tabular}{ c c || c c }
-			$a$ & $b$ & s & c \\
-			\hline
-			0 & 0 & ? & ? \\
-			0 & 1 & ? & ? \\
-			1 & 0 & ? & ? \\
-			1 & 1 & ? & ?
-		\end{tabular}
-	\end{center}
-
-	\vfill
-
-	\problem{}
-	Draw a logic circuit that atisfies the above table. \par
-	This is called a \textit{half adder}. \par
-	\hint{You should need exactly two gates.}
-
-	\begin{solution}
-		$s = a \texttt{ xor } b$ \par
-		$c = a \texttt{ and } b$
-	\end{solution}
-
-	\vfill
-
-	\definition{}
-	A \textit{full adder} is similar to a half adder, but it has an extra input: \par
-	a full adder takes $a$, $b$, and $c_\text{in}$, and produces $s$ and $c_\text{out}$. \par
-	\hint{$c_\text{in}$ is \say{carry in}}
-
-	\problem{}
-	Use two half adders to construct a full adder.
-
-	\begin{solution}
-		$s_1, c_1 = \texttt{HA}(a, b)$ \par
-		$s_2, c_2 = \texttt{HA}(s_1, c_\text{in})$ \par
-		$s_\text{out} = s_2$ \par
-		$c_\text{out} = \texttt{OR}(c_1, c_2)$
-
-		\vspace{2mm}
-
-		Of course, the class should just draw the circuit.
-	\end{solution}
-
-
-	\vfill
-	\pagebreak
-
-	\problem{}<rippleadder>
-	How can we add two four-bit binary numbers using the full adder? \par
-	We want a four-bit output sum and a one-bit $c_\text{out}$.
-
-	\vfill
-
-	\problem{}
-	Say that all basic logic gates need $1u$ of time to fully switch states. \par
-	\note[Note]{This is called \textit{gate delay}}
-
-	\vspace{2mm}
-
-	How much time does a full adder need to fully switch states? \par
-	How about your circuit from \ref{rippleadder}?
-
-	\vfill
-
-	\problem{Bonus}
-	Design a faster solution to \ref{rippleadder}.
-
-
-	\vfill
-	\pagebreak
-
-\end{document}
\ No newline at end of file
diff --git a/src/Warm-Ups/Adders/main.typ b/src/Warm-Ups/Adders/main.typ
new file mode 100644
index 0000000..5bfce18
--- /dev/null
+++ b/src/Warm-Ups/Adders/main.typ
@@ -0,0 +1,85 @@
+#import "@local/handout:0.1.0": *
+
+#show: handout.with(
+  title: [Warm-Up: Adders],
+  by: "Mark",
+)
+
+#problem()
+Fill the following binary addition table. \
+#hint([s is "sum," c is "carry"])
+
+#align(
+  center,
+  table(
+    columns: (9mm, 9mm, 9mm, 9mm),
+    align: center,
+    $a$, $b$, $s$, $c$,
+    [0], [0], [?], [?],
+    [0], [1], [?], [?],
+    [1], [0], [?], [?],
+    [1], [1], [?], [?],
+  ),
+)
+
+#v(1fr)
+
+#problem()
+Draw a logic circuit that atisfies the above table. \
+This is called a _half adder_. \
+#hint([You should need exactly two gates.])
+
+#solution([
+  $s = a #text([`xor`]) b$ \
+  $c = a #text([`and`]) b$
+])
+
+#v(1fr)
+
+#definition()
+A _full adder_ is similar to a half adder, but it has an extra input: \
+a full adder takes $a$, $b$, and $c_"in"$, and produces $s$ and $c_"out"$. \
+#hint([$c_"in"$ is "carry in"])
+
+#problem()
+Use two half adders to construct a full adder.
+
+#solution([
+  $
+    s_1, c_1 &= "HA"(a, b) \
+    s_2, c_2 &= "HA"(s_1, c_"in") \
+    s_"out" &= s_2 \
+    c_"out" &= "OR"(c_1, c_2)
+  $
+
+  #v(2mm)
+
+  Of course, the class should just draw the circuit.
+])
+
+
+#v(1fr)
+#pagebreak()
+
+
+
+#problem(label: "ripple-adder")
+How can we add two four-bit binary numbers using the full adder? \
+We want a four-bit output sum and a one-bit $c_"out"$.
+#v(1fr)
+
+#problem()
+Say that all basic logic gates need $1u$ of time to fully switch states. \
+#note([This is called _gate delay_], type: "Note")
+
+#v(2mm)
+
+How much time does a full adder need to fully switch states? \
+How about your circuit from @ripple-adder?
+
+#v(1fr)
+
+#problem("Bonus")
+Design a faster solution to @ripple-adder.
+
+#v(1fr)