177 lines
4.5 KiB
NASM
177 lines
4.5 KiB
NASM
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SECTION .text
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USE16
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cpuid_required_features:
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.edx equ cpuid_edx.fpu | cpuid_edx.pse | cpuid_edx.pge | cpuid_edx.fxsr
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.ecx equ 0
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cpuid_check:
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; If bit 21 of EFLAGS can be changed, then CPUID is supported
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pushfd ;Save EFLAGS
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pushfd ;Store EFLAGS
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xor dword [esp],0x00200000 ;Invert the ID bit in stored EFLAGS
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popfd ;Load stored EFLAGS (with ID bit inverted)
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pushfd ;Store EFLAGS again (ID bit may or may not be inverted)
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pop eax ;eax = modified EFLAGS (ID bit may or may not be inverted)
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xor eax,[esp] ;eax = whichever bits were changed
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popfd ;Restore original EFLAGS
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test eax,0x00200000 ;eax = zero if ID bit can't be changed, else non-zero
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jz .no_cpuid
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mov eax, 1
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cpuid
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and edx, cpuid_required_features.edx
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cmp edx, cpuid_required_features.edx
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jne .error
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and ecx, cpuid_required_features.ecx
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cmp ecx, cpuid_required_features.ecx
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jne .error
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ret
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.no_cpuid:
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mov si, .msg_cpuid
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call print
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mov si, .msg_line
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call print
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jmp .halt
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.error:
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push ecx
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push edx
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mov si, .msg_features
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call print
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mov si, .msg_line
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call print
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mov si, .msg_edx
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call print
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pop ebx
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push ebx
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shr ebx, 16
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call print_hex
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pop ebx
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call print_hex
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mov si, .msg_must_contain
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call print
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mov ebx, cpuid_required_features.edx
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shr ebx, 16
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call print_hex
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mov ebx, cpuid_required_features.edx
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call print_hex
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mov si, .msg_line
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call print
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mov si, .msg_ecx
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call print
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pop ebx
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push ebx
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shr ebx, 16
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call print_hex
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pop ebx
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call print_hex
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mov si, .msg_must_contain
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call print
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mov ebx, cpuid_required_features.ecx
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shr ebx, 16
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call print_hex
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mov ebx, cpuid_required_features.ecx
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call print_hex
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mov si, .msg_line
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call print
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.halt:
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cli
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hlt
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jmp .halt
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.msg_cpuid: db "CPUID not supported",0
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.msg_features: db "Required CPU features are not present",0
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.msg_line: db 13,10,0
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.msg_edx: db "EDX ",0
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.msg_ecx: db "ECX ",0
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.msg_must_contain: db " must contain ",0
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cpuid_edx:
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.fpu equ 1 << 0
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.vme equ 1 << 1
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.de equ 1 << 2
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.pse equ 1 << 3
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.tsc equ 1 << 4
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.msr equ 1 << 5
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.pae equ 1 << 6
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.mce equ 1 << 7
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.cx8 equ 1 << 8
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.apic equ 1 << 9
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.sep equ 1 << 11
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.mtrr equ 1 << 12
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.pge equ 1 << 13
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.mca equ 1 << 14
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.cmov equ 1 << 15
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.pat equ 1 << 16
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.pse_36 equ 1 << 17
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.psn equ 1 << 18
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.clfsh equ 1 << 19
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.ds equ 1 << 21
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.acpi equ 1 << 22
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.mmx equ 1 << 23
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.fxsr equ 1 << 24
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.sse equ 1 << 25
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.sse2 equ 1 << 26
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.ss equ 1 << 27
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.htt equ 1 << 28
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.tm equ 1 << 29
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.ia64 equ 1 << 30
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.pbe equ 1 << 31
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cpuid_ecx:
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.sse3 equ 1 << 0
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.pclmulqdq equ 1 << 1
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.dtes64 equ 1 << 2
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.monitor equ 1 << 3
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.ds_cpl equ 1 << 4
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.vmx equ 1 << 5
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.smx equ 1 << 6
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.est equ 1 << 7
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.tm2 equ 1 << 8
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.ssse3 equ 1 << 9
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.cnxt_id equ 1 << 10
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.sdbg equ 1 << 11
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.fma equ 1 << 12
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.cmpxchg16b equ 1 << 13
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.xtpr equ 1 << 14
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.pdcm equ 1 << 15
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.pcid equ 1 << 17
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.dca equ 1 << 18
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.sse4_1 equ 1 << 19
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.sse4_2 equ 1 << 20
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.x2apic equ 1 << 21
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.movbe equ 1 << 22
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.popcnt equ 1 << 23
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.tsc_deadline equ 1 << 24
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.aes equ 1 << 25
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.xsave equ 1 << 26
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.osxsave equ 1 << 27
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.avx equ 1 << 28
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.f16c equ 1 << 29
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.rdrand equ 1 << 30
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.hypervisor equ 1 << 31
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